Enhanced Virtual Prototyping for Heterogeneous Systems - Tapa dura

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Muhammad Hassan received the B.Sc. degree in Telecommunication engineering from NUCES-FAST University, Islamabad, Pakistan and M.Sc. degree in Communication engineering from RWTH Aachen, Germany, in 2010 and 2015, respectively. He received the Dr.-Ing degree in computer science from the University of Bremen in 2021. Since 2017 he is Researcher at the German Research Center for Artificial Intelligence (DFKI) in Bremen. Additionally, he is working as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen since 2021. His current research interests include verification, virtual prototyping, heterogeneous systems, and blockchain. He received best paper in DVCon Europe 2018.

Daniel Große received the Dr.-Ing. degree in computer science from the University of Bremen in 2008. He remained as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computerarchitecture with the University of Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. After that, until 2020, he was a Senior Researcher at the University of Bremen as well as Scientific Coordinator of the Graduate School System Design funded within the German Excellence Initiative. In addition, he has been working at the German Research Center for Artificial Intelligence (DFKI) since 2015. In July 2020, he became a full professor at the Johannes Kepler University Linz, Austria, where he is the head of the Institute for Complex Systems. His current research interests include verification, virtual prototyping, debugging, synthesis and RISC-V. He published over 150 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including ASP-DAC, DAC, DATE, ICCAD, CODES+ISSS, GLSVLSI, FDL, and MEMOCODE. He received best paper awards (FDL 2007,DVCon Europe 2018, ICCAD 2018 and FDL 2020) as well as business-related awards (IKT Innovativ Award 2013, Weconomy Award 2013, and Embedded Award 2014). He is an IEEE Senior Member and an Allied Member of the Accellera Systems Initiative in the SystemC Verification Working Group.

Rolf Drechsler is head of Cyber-Physical Systems department at the German Research Center for Artificial Intelligence (DFKI) since 2011. Furthermore, he is a Full Professor at the Institute of Computer Science, University of Bremen, since 2001. Before, he worked for the Corporate Technology Department of Siemens AG, and was with the Institute of Computer Science, Albert-Ludwig University of Freiburg/Breisgau, Germany. Rolf Drechsler received the Diploma and Dr. Phil. Nat. degrees in computer science from the Goethe-University in Frankfurt/Main, Germany, in 1992 and, respectively, 1995. Rolf Drechsler focuses in his research at DFKI and in the Group for Computer Architecture, which he is heading at the Institute of Computer Science of the University of Bremen, on the development and design of data structures and algorithms with an emphasis on circuit and system design. He is an ACM Distinguished Member and an IEEE Fellow.

De la contraportada

This book describes a comprehensive combination of methodologies that strongly enhance the modern Virtual Prototype (VP)-based verification flow for heterogeneous systems-on-chip (SOCs). In particular, the book combines verification and analysis aspects across various stages of the VP-based verification flow, providing a new perspective on verification by leveraging advanced techniques, like metamorphic testing, data flow testing, and information flow testing. In addition, the book puts a strong emphasis on advanced coverage-driven methodologies to verify the functional behavior of the SOC as well as ensure its security.

• Provides an extensive introduction to the modern VP-based verification flow for heterogeneous SOCs;
• Introduces a novel metamorphic testing technique for heterogeneous SOCs which does not require reference models;
• Includes automated advanced data flow coverage-driven methodologies tailored for SystemC/AMS-based VPs;
• Describes enhanced functional coverage-driven methodologies to verify various functional behaviors of RF amplifiers.