A Pipelined Multi-Core Machine with Operating System Support: Hardware Implementation and Correctness Proof - Tapa blanda

Sinopsis

Introductory material.- on hierarchical hardware design.- hardware library.- basic processor design.- pipelining.- cache memory systems.- interrupt mechanism.- self modification, instruction buffer and nondeterministic ISA.- memory management units.- store buffers.- multi-core processors.- advanced programmable interrupt controllers (APICs).- adding a disk.- I/O apic.

"Sinopsis" puede pertenecer a otra edición de este libro.