RISC Microprocessors, History and Overview: 3 (Computer Architecture) - Tapa blanda

Stakem, Mr. Patrick H.

 
9781726803601: RISC Microprocessors, History and Overview: 3 (Computer Architecture)

Sinopsis

This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for “Relegate Important Stuff to the Compiler,” since the compilation process is done offline, and then the code is run. The time penalty paid at compile time is paid back by faster code execution. RISC machines place more burdens on their compilers. The alternative to RISC is CISC – Complex Instruction Set Computer. An example would be the legacy Intel x86, IA-32 instruction set. RISC involves a series of architectural features to enhance the throughput of operations. RISC has become a mainstream architectural feature in modern processors.

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Reseña del editor

This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for “Relegate Important Stuff to the Compiler,” since the compilation process is done offline, and then the code is run. The time penalty paid at compile time is paid back by faster code execution. RISC machines place more burdens on their compilers. The alternative to RISC is CISC – Complex Instruction Set Computer. An example would be the legacy Intel x86, IA-32 instruction set. RISC involves a series of architectural features to enhance the throughput of operations. RISC has become a mainstream architectural feature in modern processors.

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Otras ediciones populares con el mismo título

9781520216287: RISC Microprocessors, History and Overview

Edición Destacada

ISBN 10:  1520216289 ISBN 13:  9781520216287
Editorial: Independently published, 2017
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