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9781598293500: An Introduction to Logic Circuit Testing (Synthesis Lectures on Digital Circuits and Systems)

Sinopsis

An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References

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Reseña del editor

An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References

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  • EditorialMorgan and Claypool Publishers
  • Año de publicación2008
  • ISBN 10 1598293508
  • ISBN 13 9781598293500
  • EncuadernaciónTapa blanda
  • IdiomaInglés
  • Número de páginas110
  • Contacto del fabricanteno disponible

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9783031797842: An Introduction to Logic Circuit Testing (Synthesis Lectures on Digital Circuits & Systems)

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ISBN 10:  3031797841 ISBN 13:  9783031797842
Editorial: Springer, 2008
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Parag K. Lala
Publicado por Morgan & Claypool, 2009
ISBN 10: 1598293508 ISBN 13: 9781598293500
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Librería: BookOrders, Russell, IA, Estados Unidos de America

Calificación del vendedor: 4 de 5 estrellas Valoración 4 estrellas, Más información sobre las valoraciones de los vendedores

Soft Cover. Condición: Good. Ex-library with the usual features. Library label on front cover. The interior is clean and tight. Binding is good. Cover shows light wear. Ex-Library. Nº de ref. del artículo: 122109

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