This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.
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This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.
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Librería: Brook Bookstore On Demand, Napoli, NA, Italia
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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters. 224 pp. Englisch. Nº de ref. del artículo: 9781489993182
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Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Describes efficient procedures for hierarchical top-down design of pipeline convertersPresents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances. Nº de ref. del artículo: 11466929
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Condición: New. pp. 224. Nº de ref. del artículo: 26357408370
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Taschenbuch. Condición: Neu. Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs | Jesús Ruiz-Amaya (u. a.) | Taschenbuch | xiii | Englisch | 2014 | Humana | EAN 9781489993182 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Nº de ref. del artículo: 104987617
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Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 224 pp. Englisch. Nº de ref. del artículo: 9781489993182
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