Design Automation for Timing-Driven Layout Synthesis - Tapa blanda

Sinopsis

List of Figures. 1. Introduction. 2. Delay Estimation. 3. Transistor Sizing Algorithms: Existing Approaches. 4. A Convex Programming Approach to Transistor Sizing. 5. Global Routing Using Zero-One Integer Linear Programming. 6. Timing-Driven CMOS Layout Synthesis. Bibliography. Index.

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