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Sinopsis
The simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore’s Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril.
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High Speed Serdes Devices and Applications provides a broad understanding of High Speed Serdes (HSS) device usage. The material focuses on HSS devices, and the consolidation of related topics into a single text. Chip and system designers using HSS devices must have detailed knowledge of both the features and functions of the HSS device, and the applications in which they are used. Also designers must have a working knowledge of related subjects, including: reference clock architectures, signal integrity, power dissipation, and test features and functions. The authors consolidate these topics with a specific focus on HSS devices. This approach provides the chip designer sufficient background information for using HSS devices on their chips.
The chapters can be viewed as four distinct sections. The first section relates to the features, functions, and design of HSS devices. Second are chapters that describe the features and functions of protocol logic used to implement various network protocol interface standards. The third section covers specialized topics related to HSS cores. Finally, characteristics of typical design kit models to facilitate integration within the chip design are discussed.
High Speed Serdes Devices and Applications is a useful resource for chip designers using HSS devices in their chip design.
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High Speed Serdes Devices and Applications
Publicado por
Springer US Nov 2010, 2010
ISBN 10: 1441946411
ISBN 13: 9781441946416
Nuevo
Taschenbuch
Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
Calificación del vendedor: 5 de 5 estrellas
Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore's Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril. 500 pp. Englisch. Nº de ref. del artículo: 9781441946416
Cantidad disponible: 2 disponibles
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High Speed Serdes Devices and Applications
Impresión bajo demandaLibrería: moluna, Greven, Alemania
Calificación del vendedor: 5 de 5 estrellas
Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides information on the features and functions typically found on HSS devicesExplains how HSS devices are used in protocol applicationsDescribes the features, functions, and considerations associated with designing and analyzing a refer. Nº de ref. del artículo: 4174974
Cantidad disponible: Más de 20 disponibles
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High Speed Serdes Devices and Applications
Librería: Ria Christie Collections, Uxbridge, Reino Unido
Calificación del vendedor: 5 de 5 estrellas
Condición: New. In. Nº de ref. del artículo: ria9781441946416_new
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High Speed Serdes Devices and Applications
Publicado por
Springer US, Springer US, 2010
ISBN 10: 1441946411
ISBN 13: 9781441946416
Nuevo
Taschenbuch
Librería: AHA-BUCH GmbH, Einbeck, Alemania
Calificación del vendedor: 5 de 5 estrellas
Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - The simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore's Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril. Nº de ref. del artículo: 9781441946416
Cantidad disponible: 1 disponibles
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High Speed Serdes Devices and Applications
Librería: Mispah books, Redhill, SURRE, Reino Unido
Calificación del vendedor: 4 de 5 estrellas
Paperback. Condición: Like New. Like New. book. Nº de ref. del artículo: ERICA77314419464116
Cantidad disponible: 1 disponibles
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High Speed Serdes Devices and Applications
Publicado por
Springer US, Springer US Nov 2010, 2010
ISBN 10: 1441946411
ISBN 13: 9781441946416
Nuevo
Taschenbuch
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemania
Calificación del vendedor: 5 de 5 estrellas
Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore¿s Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 500 pp. Englisch. Nº de ref. del artículo: 9781441946416
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High Speed Serdes Devices and Applications
Librería: Lucky's Textbooks, Dallas, TX, Estados Unidos de America
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Condición: New. Nº de ref. del artículo: ABLIING23Mar2411530296082
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