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Practical UVM: Step by Step Examples - Tapa blanda

Vasudevan, Srivatsa

 
9780997789607: Practical UVM: Step by Step Examples
Tapa blanda
ISBN 10: 0997789603 ISBN 13: 9780997789607
Editorial: Srivatsa Vasudevan, 2016

Sinopsis

The Universal Verification Methodology is an industry standard used by many companies for verifying ASIC devices. In this book, you will find step-by-step instructions, coding guidelines and debugging features of UVM explained clearly using examples. The book also covers the changes from UVM-1.1d to UVM 1.2 and provides details of the enhancements in the upcoming IEEE 1800.2 UVM standard: http://www.accellera.org/community/uvm/faq The Table of Contents, Preface, Foreword from UVM committee members and detailed information on this book is available on www.uvmbook.com.

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Acerca del autor

Srivatsa Vasudevan is a Principal Engineer at Synopsys in Mountain View California USA. He works on cutting edge designs and has extensive verification experience. His expertise lies in Methodology, simulation performance and helping teams with complex technical challenges.

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Editorial
Srivatsa Vasudevan
Año de publicación
2016
Idioma
Inglés
ISBN 10 
0997789603
ISBN 13 
9780997789607
Encuadernación
Tapa blanda
Número de páginas
430
Contacto del fabricante
Manufactured by Amazon on behalf of the author
https://www.amazon.es/hz/contact-us

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