The Interaction of Compilation Technology and Computer Architecture - Tapa dura

 
9780792394518: The Interaction of Compilation Technology and Computer Architecture
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ISBN 10: 0792394518 ISBN 13: 9780792394518
Editorial: Springer, 1994

Sinopsis

In brief summary, the following results were presented in this work: • A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. • An algorithm was developed for finding register requirements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. • We presented an efficient method of estimating register requirements as a function of pipeline depth. • We developed a technique for efficiently finding bounds on register require­ ments as a function of pipeline depth. • Presented experimental data to verify these new techniques. • discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O’Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com­ piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing ’88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966.

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Reseña del editor

In brief summary, the following results were presented in this work: · A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. · An algorithm was developed for finding register requirements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. · We presented an efficient method of estimating register requirements as a function of pipeline depth. · We developed a technique for efficiently finding bounds on register require­ ments as a function of pipeline depth. · Presented experimental data to verify these new techniques. · discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com­ piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966.

Reseña del editor

The Interaction of Compilation Technology and Computer Architecture demonstrates the importance of integrating contemporary compilation technology with a supporting computer architecture to enhance system performance. The chapters in this book are written by individuals who are experts in their respective areas. Each chapter examines how best to exploit the interaction between the architecture and the compiler. The book explores three different aspects of this interaction. Chapters 2-6 examine the interaction of the compiler and the architecture at the instruction level on uniprocessors with multiple function units and highly segmented pipelines. Chapters 7 and 8 examine compilation issues for multiprocessor systems. The last two chapters discuss how programming language features can influence the design of both uniprocessor and multiprocessor systems. The Interaction of Compilation Technology and Computer Architecture demonstrates the close coupling needed between the compiler and the architecture to achieve high performance, particularly in parallel machines.

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Editorial
Springer
Año de publicación
1994
Idioma
Inglés
ISBN 10 
0792394518
ISBN 13 
9780792394518
Encuadernación
Tapa dura
Número de páginas
304
Editor
Lilja David J., Bird Peter L.
Contacto del fabricante
no disponible
Persona responsable
CMN Printpool Inh. Mathis Neumann
https://www.also.com/ec/cms5/en_6000/6000/index.jsp

Friedrich-Karl-Str. 9
Hamburg
Alemania

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9781461361541: The Interaction of Compilation Technology and Computer Architecture

Edición Destacada

ISBN 10:  1461361540 ISBN 13:  9781461361541
Editorial: Springer, 2012
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