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Sinopsis
Book by Bening Lionel Foster Harry D
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Reseña del editor
Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
The intended audience for Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog is engineers and students who need an introduction to various design verification processes and a supporting functional Verilog RTL coding style. A second intended audience is engineers who have been through introductory training in Verilog and now want to develop good RTL writing practices for verification. A third audience is Verilog language instructors who are using a general text on Verilog as the course textbook but want to enrich their lectures with an emphasis on verification. A fourth audience is engineers with substantial Verilog experience who want to improve their Verilog practice to work better with RTL Verilog verification tools. A fifth audience is design consultants searching for proven verification-centric methodologies. A sixth audience is EDA verification tool implementers who want some suggestions about a minimal Verilog verification subset.
Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog is based on the reality that comes from actual large-scale product design process and tool experience.
Reseña del editor
Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labour costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.
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- EditorialKluwer Academic Publishers
- Año de publicación2000
- ISBN 10 0792377885
- ISBN 13 9780792377887
- EncuadernaciónTapa dura
- IdiomaInglés
- Número de páginas272
- EditorBening Lionel, Foster Harry
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Principles of Verifiable RTL Design : A Functional Coding Style Supporting Verification Processes in Verilog
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Springer, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Librería: Better World Books: West, Reno, NV, Estados Unidos de America
Calificación del vendedor: 5 de 5 estrellas
Condición: Very Good. 1st Edition. Used book that is in excellent condition. May show signs of wear or have minor defects. Nº de ref. del artículo: 5102596-6
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Principles of Verifiable RTL Design : A Functional Coding Style Supporting Verification Processes in Verilog
Publicado por
Springer, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
Antiguo o usado
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Librería: Better World Books, Mishawaka, IN, Estados Unidos de America
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Condición: As New. 1st Edition. Used book that is in almost brand-new condition. Nº de ref. del artículo: 50877156-6
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Publicado por
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Librería: ThriftBooks-Dallas, Dallas, TX, Estados Unidos de America
Calificación del vendedor: 5 de 5 estrellas
Hardcover. Condición: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less 0.35. Nº de ref. del artículo: G0792377885I4N00
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Publicado por
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
Antiguo o usado
Tapa dura
Librería: ThriftBooks-Reno, Reno, NV, Estados Unidos de America
Calificación del vendedor: 5 de 5 estrellas
Hardcover. Condición: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less 0.35. Nº de ref. del artículo: G0792377885I4N00
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Publicado por
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
Antiguo o usado
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Librería: ThriftBooks-Atlanta, AUSTELL, GA, Estados Unidos de America
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Hardcover. Condición: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less 0.35. Nº de ref. del artículo: G0792377885I4N00
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Publicado por
Kluwer Academic Publishers, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Librería: Munster & Company LLC, ABAA/ILAB, Corvallis, OR, Estados Unidos de America
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Condición: Good. Kluwer Academic Publishers, 2000. Cover very barely rubbed, top spine end/bottom corners bumped; fore-edge very barely soiled; binding tight; cover, edges, and interior intact and very clean; a nice copy. hardcover. Good. Nº de ref. del artículo: 594941
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Principles of Verifiable RTL Design - A Functional Coding Style Supporting Verification Processes
Publicado por
Kluwer Academic, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Librería: Thomas F. Pesce', Anaheim, CA, Estados Unidos de America
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Hard Cover. Condición: Very Good. Purple covers and spine with bold clear, lettering. Pages are clean, tight and bright. The prior owner's initials are printed on the top pages' edges. Nº de ref. del artículo: 6022313
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Principles of Verifiable Rtl Design:; a functional coding style supporting verification processes in Verilog
Publicado por
Kluwer Academic Publishers, Norwell, Mass, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Librería: BIBLIOPE by Calvello Books, Oakland, CA, Estados Unidos de America
Calificación del vendedor: 4 de 5 estrellas
Hardcover. Condición: near fine(+). Purple octavo; xvii, 253 p, b&w illus; 24 cm. Contents: Register Transfer Level --; What is It? --; Verifiable RTL --; Applying Design Discipline --; The Verification Process --; Specification Design Decomposition --; High-Level Design Requirements --; Block-Level Specification and Design --; RTL Implementation --; Synthesis and Physical Design --; Functional Test Strategies --; Deterministic or Directed Test --; Random Test --; Transaction Analyzer Verification --; Chip Initialization Verification --; Synthesizable Testbench --; Transformation Test Strategies --; Coverage, Events and Assertions --; Coverage --; Ad-hoc Metrics --; Programming Code Metrics --; State Machine and Arc Coverage Metrics --; User Defined Metrics --; Fault Coverage Metrics --; Regression Analysis and Test Suite Optimization --; Event Monitors and Assertion Checkers --; Events --; Assertions --; Assertion Monitor Library Details --; Event Monitor and Assertion Checker Methodology --; Linting Strategy --; Implementation Considerations --; Event Monitor Database and Analysis --; RTL Methodology Basics --; Simple RTL Verifiable Subset --; Linting --; Linting in a design project --; Lint description --; Project Oriented --; Linting Message Examples --; Object-Based Hardware Design --; OBHD and Simulation --; OBHD and Formal Verification --; OBHD and Physical Design --; OBHD Synthesis --; OBHD Scan Chain Hookup --; A Text Macro Implementation --; RTL Logic Simulation --; Simulation History --; First Steps --; X, Z and Other States --; Function and Timing --; Gate to RTL Migration --; Acceleration and Emulation --; Language Standardization. Integrated circuits -- Very large scale integration -- Computer-aided design. Faint rubbed fold to spine head & foot & folds, barely rubbed corners, else near fine(+). First edition (presumed; no earlier dates stated). Nº de ref. del artículo: 23856
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Principles of Verifiable RTL Design - A Functional Coding Style Supporting Verification Processes
Publicado por
Kluwer Academic Publishers Group, 2000
ISBN 10: 0792377885
ISBN 13: 9780792377887
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Librería: The Book Bin, Salem, OR, Estados Unidos de America
Calificación del vendedor: 5 de 5 estrellas
Hardcover. Condición: Very Good. Signed by authors Lionel Bening and Harry Foster at the first page. Covers very good with only minor shelf-wear. Spine square. Binding sound. No jacket, as issued. Prior owner's name penned to top of textblock. Pages else clean, interior bright and unmarked. Signed. Nº de ref. del artículo: BBS-2020342
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Principles of Verifiable RTL Design - A Functional Coding Style Supporting Verification Processes
Librería: The Book Spot, Sioux Falls, MN, Estados Unidos de America
Calificación del vendedor: 4 de 5 estrellas
Hardcover. Nº de ref. del artículo: Abebooks205643
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