Sinopsis
This book is the second of two volumes addressing the design challenges associated with new generations of semiconductor technology. The various chapters are compiled from tutorials presented at workshops in recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip.
"Sinopsis" puede pertenecer a otra edición de este libro.
Acerca del autor
Ricardo Reis is a former president of the Brazilian Computer Society and former vice-president of the Brazilian Microelectronics Society. He is now trustee of both societies. He is a trustee and former vice-president of the International Federation for Information Processing, IFIP. He received the Silver Core Award from IFIP. He is member of IFIP TC10 and WG 10.5. He is the Editor-in-Chief of the Journal of Integrated Circuits and Systems, JICS. Ricardo is also Member of the Editorial Board Latin America liaison of the IEEE D&T as Latin America liaison. He contributed to the organizing and program committees of several a large number of international conferences (like VLSI-SoC, ISVLSI, ISSS+CODES, PATMOS, RAW, LATW, SBCCI, IFIP World Congress, …) and he is a founder of the SBCCI conference series (Symposium on Integrated Circuits and Systems Design). He is also Editor of several books.
"Sobre este título" puede pertenecer a otra edición de este libro.
Otras ediciones populares con el mismo título
Resultados de la búsqueda para Design of Systems on a Chip: Design and Test
Imagen de archivo
Design of Systems on a Chip: Design and Test.
Publicado por
Dordrecht, Springer., 2006
ISBN 10: 0387324992
ISBN 13: 9780387324999
Antiguo o usado
Tapa dura
Librería: Universitätsbuchhandlung Herta Hold GmbH, Berlin, Alemania
Calificación del vendedor: 5 de 5 estrellas
X, 233 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Stamped. Sprache: Englisch. Nº de ref. del artículo: 794DB
Comprar usado
EUR 12,00
Gastos de envío:
EUR 30,00
De Alemania a Estados Unidos de America
Cantidad disponible: 1 disponibles
Imagen de archivo
Design of Systems on a Chip : Design and Test
Publicado por
Springer, 2006
ISBN 10: 0387324992
ISBN 13: 9780387324999
Antiguo o usado
Tapa dura
Original o primera edición
Librería: Better World Books Ltd, Dunfermline, Reino Unido
Calificación del vendedor: 5 de 5 estrellas
Condición: Very Good. 1st Edition. Ships from the UK. Former library book; may include library markings. Used book that is in excellent condition. May show signs of wear or have minor defects. Nº de ref. del artículo: 16242457-6
Comprar usado
EUR 53,07
Gastos de envío:
EUR 9,06
De Reino Unido a Estados Unidos de America
Cantidad disponible: 2 disponibles
Imagen de archivo
Design of Systems on a Chip: Design and Test
Librería: Lucky's Textbooks, Dallas, TX, Estados Unidos de America
Calificación del vendedor: 5 de 5 estrellas
Condición: New. Nº de ref. del artículo: ABLIING23Feb2215580171877
Comprar nuevo
EUR 158,31
Gastos de envío:
EUR 3,44
A Estados Unidos de America
Cantidad disponible: Más de 20 disponibles
Imagen de archivo
Design of Systems on a Chip: Design and Test
Librería: Ria Christie Collections, Uxbridge, Reino Unido
Calificación del vendedor: 5 de 5 estrellas
Condición: New. In. Nº de ref. del artículo: ria9780387324999_new
Comprar nuevo
EUR 156,52
Gastos de envío:
EUR 13,57
De Reino Unido a Estados Unidos de America
Cantidad disponible: Más de 20 disponibles
Imagen del vendedor
Design of Systems on a Chip: Design and Test
Impresión bajo demandaLibrería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
Calificación del vendedor: 5 de 5 estrellas
Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is the second of two volumes addressing the design challenges associated with new generations of semiconductor technology. The various chapters are compiled from tutorials presented at workshops in recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. 244 pp. Englisch. Nº de ref. del artículo: 9780387324999
Comprar nuevo
EUR 160,49
Gastos de envío:
EUR 23,00
De Alemania a Estados Unidos de America
Cantidad disponible: 2 disponibles
Imagen del vendedor
Design of Systems on a Chip: Design and Test
Impresión bajo demandaLibrería: moluna, Greven, Alemania
Calificación del vendedor: 4 de 5 estrellas
Gebunden. Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. A practical and academic overview of Systems-on-ChipDesign and test aspects are high lightedRicardo Reis is a former president of the Brazilian Computer Society and former vice-president of the Brazilian Microelectronics Society. He is . Nº de ref. del artículo: 5909979
Comprar nuevo
EUR 136,16
Gastos de envío:
EUR 48,99
De Alemania a Estados Unidos de America
Cantidad disponible: Más de 20 disponibles
Imagen de archivo
Design of Systems on a Chip: Design and Test
Publicado por
Springer US, 2006
ISBN 10: 0387324992
ISBN 13: 9780387324999
Antiguo o usado
Tapa dura
Librería: Buchpark, Trebbin, Alemania
Calificación del vendedor: 5 de 5 estrellas
Condición: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher. Nº de ref. del artículo: 2993268/12
Comprar usado
EUR 93,74
Gastos de envío:
EUR 105,00
De Alemania a Estados Unidos de America
Cantidad disponible: 1 disponibles
Imagen del vendedor
Design of Systems on a Chip: Design and Test
Impresión bajo demandaLibrería: preigu, Osnabrück, Alemania
Calificación del vendedor: 5 de 5 estrellas
Buch. Condición: Neu. Design of Systems on a Chip: Design and Test | Ricardo Reis (u. a.) | Buch | x | Englisch | 2006 | Springer US | EAN 9780387324999 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand. Nº de ref. del artículo: 102231488
Comprar nuevo
EUR 141,30
Gastos de envío:
EUR 70,00
De Alemania a Estados Unidos de America
Cantidad disponible: 5 disponibles
Imagen del vendedor
Design of Systems on a Chip: Design and Test
Publicado por
Springer US, Springer US Okt 2006, 2006
ISBN 10: 0387324992
ISBN 13: 9780387324999
Nuevo
Tapa dura
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemania
Calificación del vendedor: 5 de 5 estrellas
Buch. Condición: Neu. Neuware -Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in the recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 244 pp. Englisch. Nº de ref. del artículo: 9780387324999
Comprar nuevo
EUR 160,49
Gastos de envío:
EUR 60,00
De Alemania a Estados Unidos de America
Cantidad disponible: 2 disponibles
Imagen del vendedor
Design of Systems on a Chip: Design and Test
Publicado por
Springer US, Springer US, 2006
ISBN 10: 0387324992
ISBN 13: 9780387324999
Nuevo
Tapa dura
Librería: AHA-BUCH GmbH, Einbeck, Alemania
Calificación del vendedor: 5 de 5 estrellas
Buch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in the recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications. Nº de ref. del artículo: 9780387324999
Comprar nuevo
EUR 164,49
Gastos de envío:
EUR 62,68
De Alemania a Estados Unidos de America
Cantidad disponible: 1 disponibles