Network Processor Design: Issues and Practices, Volume 3 (The Morgan Kaufmann Series in Computer Architecture and Design, Volume 3) - Tapa blanda

Reseña del editor

The past few years have seen significant change in the landscape of high-end network processing. In response to the formidable challenges facing this emerging field, the editors of this series set out to survey the latest research and practices in the design, programming, and use of network processors.

Through chapters on hardware, software, performance and modeling, Network Processor Design illustrates the potential for new NP applications, helping to lay a theoretical foundation for the architecture, evaluation, and programming of networking processors.

Like Volume 2 of the series, Volume 3 further shifts the focus from achieving higher levels of packet processing performance to addressing other critical factors such as ease of programming, application developments, power, and performance prediction. In addition, Volume 3 emphasizes forward-looking, leading-edge research in the areas of architecture, tools and techniques, and applications such as high-speed intrusion detection and prevention system design, and the implementation of new interconnect standards.

• Investigates current applications of network processor technology at Intel; Infineon Technologies; and NetModule
• Presents current research in network processor design in three distinct areas:
• Architecture at Washington University, St. Louis; Oregon Health and Science University; University of Georgia; and North Carolina State University.
• Tools and Techniques at University of Texas, Austin; Academy of Sciences, China; University of Paderborn, Germany; and University of Massachusetts, Amherst.
• Applications at University of California, Berkeley; Universidad Complutense de Madrid, Spain; ETH Zurich, Switzerland; Georgia Institute of Technology; Vrije Universiteit, the Netherlands; and Universiteit Leiden, the Netherlands.

Biografía del autor

Mark A. Franklin received his B.A., B.S.E.E. and M.S.E.E. from Columbia University, and his Ph.D. in EE from Carnegie-Mellon University. He is currently at Washington University in St. Louis where he has a joint appointment in Electrical Engineering and Computer Science, and holds the Urbauer Chair in Engineering. He founded and is Director of the Computer and Communications Research Center and until recently was the Director of the Undergraduate Program in Computer Engineering. Dr. Franklin is engaged in research, teaching and consulting in the areas of computer and communications architectures, ASIC and embedded processor design, parallel and distributed systems, and systems performance evaluation. He is a Fellow of the IEEE, a member of the ACM, and has been an organizer and reviewer for numerous professional conferences including the HPCA8 Workshop on Network Processors (2002). He has been Chair of the IEEE TCCA (Technical Committee on Computer Architecture), and Vice-Chairman of the ACM SIGARCH (Special Interest Group on Computer Architecture).