VHDL: Modular Design and Synthesis of Cores and Systems, 3rd Edition - Tapa dura

Reseña del editor

Utilize the Latest VHDL Tools and Techniques for Designing Embedded Cores, Cutting-Edge Processors, RT Level Components, and Complex Digital Systems

The classic VHDL: Modular Design and Synthesis of Cores and Systems has been fully updated to cover methodologies of modern design and the latest uses of VHDL for digital system design. The book shows you how to utilize VHDL to create specific constructs for specific hardware parts, focusing on VHDL's new libraries and packages.

This cutting-edge resource explores the design of RT level components; the application of these components in a core-based design; and the development of a complete processor design with its hardware and software as a core in a system-on-a-chip (SoC). Filled with over 150 illustrations, VHDL: Modular Design and Synthesis of Cores and Systems features:

• An entire toolkit for register-transfer level digital system design
• Testbench development techniques
• New to this edition: Coverage of the latest uses of VHDL for digital system design, design of IP cores, interactive and self checking testbench development, and VHDL's new libraries and packages

Inside this State-of-the-Art VHDL Design Tool

·Design Methodology · VHDL Overview · Structure of VHDL · Simulation Model · Combinational Circuits · Sequential Circuits · Testbench Development · Control-Data Partitioned Designs · Design of RTL Embedded Cores · CPU RT Level Design · CPU Memory Instruction Level Testing · Software Tools · Embedded System Design

Biografía del autor

Zainalabedin Navabi, Ph.D., navabi@ece.neu.edu, is adjunct professor of electrical and computer engineering at Northeastern University and the author of both editions of VDHL: Analysis and Modeling of Digital Systems, published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system automation. He has served as a consultant for several EDA companies developing HDL based tools and environments. Dr. Navabi is a member of ACM, IEEE, IEEE computer society, and an active participant in IEEE DASC committee that sets standards related to hardware description languages