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Añadir al carritoPaperback. Condición: Brand New. reprint edition. 435 pages. 10.00x7.01x1.04 inches. In Stock.
Idioma: Inglés
Publicado por Springer US, Springer US Aug 2016, 2016
ISBN 10: 1489979271 ISBN 13: 9781489979278
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. Neuware -This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 460 pp. Englisch.
Idioma: Inglés
Publicado por Springer US, Springer US, 2016
ISBN 10: 1489979271 ISBN 13: 9781489979278
Librería: AHA-BUCH GmbH, Einbeck, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
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Añadir al carritoCondición: Gut. Zustand: Gut | Seiten: 460 | Sprache: Englisch | Produktart: Bücher | This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies. 460 pp. Englisch.
Librería: moluna, Greven, Alemania
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Añadir al carritoCondición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. About the AuthorDr. Zainalabedin Navabi is a professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments.
Idioma: Inglés
Publicado por Springer-Verlag New York Inc., 2016
ISBN 10: 1489979271 ISBN 13: 9781489979278
Librería: THE SAINT BOOKSTORE, Southport, Reino Unido
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Añadir al carritoPaperback / softback. Condición: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.
Librería: preigu, Osnabrück, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. Digital System Test and Testable Design | Using HDL Models and Architectures | Zainalabedin Navabi | Taschenbuch | xvii | Englisch | 2016 | Springer US | EAN 9781489979278 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand.