DFT+Dfd: An Integrated Method for Design for Testability and Diagnosis

 
9783843388016: DFT+Dfd: An Integrated Method for Design for Testability and Diagnosis
Ver todas las copias de esta edición ISBN.
 
 
Reseña del editor:

While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored.

Biografía del autor:

Nikhil Rahagude received the B.E. degree in Electronics Engineering from Veermata Jijabai Technological Institute, Mumbai, India in 2007 and the M.S. degree in Electrical and Computer Engineering from Virginia Tech, Blacksburg, USA in 2010. His interests include ATPG, fault diagnosis, design for testability (DFT) and design for diagnosis (DFD).

Nikhil Rahagude received the B.E. degree in Electronics Engineering from Veermata Jijabai Technological Institute, Mumbai, India in 2007 and the M.S. degree in Electrical and Computer Engineering from Virginia Tech, Blacksburg, USA in 2010. His interests include ATPG, fault diagnosis, design for testability (DFT) and design for diagnosis (DFD).

"Sobre este título" puede pertenecer a otra edición de este libro.

Comprar nuevo Ver libro

Gastos de envío: EUR 2,99
De Alemania a Estados Unidos de America

Destinos, gastos y plazos de envío

Añadir al carrito

Los mejores resultados en AbeBooks

1.

Rahagude, Nikhil / Hsiao, Michael
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Cantidad disponible: 1
Librería
Valoración
[?]

Descripción Condición: New. Publisher/Verlag: LAP Lambert Academic Publishing | Enhancing Fault Coverage and Diagnostic Resolution Synergistically | While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored. | Format: Paperback | Language/Sprache: english | 144 gr | 96 pp. Nº de ref. del artículo: K9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 45,74
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 2,99
De Alemania a Estados Unidos de America
Destinos, gastos y plazos de envío

2.

Nikhil Rahagude
Publicado por LAP Lambert Academic Publishing 2011-02-17 (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo paperback Cantidad disponible: > 20
Librería
Blackwell's
(Oxford, OX, Reino Unido)
Valoración
[?]

Descripción LAP Lambert Academic Publishing 2011-02-17, 2011. paperback. Condición: New. Nº de ref. del artículo: 9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 42,47
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 6,81
De Reino Unido a Estados Unidos de America
Destinos, gastos y plazos de envío

3.

Rahagude, Nikhil
Publicado por LAP Lambert Academic Publishing (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Cantidad disponible: > 20
Impresión bajo demanda
Librería
Pbshop
(Wood Dale, IL, Estados Unidos de America)
Valoración
[?]

Descripción LAP Lambert Academic Publishing, 2011. PAP. Condición: New. New Book. Shipped from US within 10 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000. Nº de ref. del artículo: IQ-9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 51,59
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 3,26
A Estados Unidos de America
Destinos, gastos y plazos de envío

4.

Rahagude, Nikhil
Publicado por LAP Lambert Academic Publishing (2016)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Paperback Cantidad disponible: 1
Impresión bajo demanda
Librería
Ria Christie Collections
(Uxbridge, Reino Unido)
Valoración
[?]

Descripción LAP Lambert Academic Publishing, 2016. Paperback. Condición: New. PRINT ON DEMAND Book; New; Publication Year 2016; Not Signed; Fast Shipping from the UK. No. book. Nº de ref. del artículo: ria9783843388016_lsuk

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 50,63
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 4,41
De Reino Unido a Estados Unidos de America
Destinos, gastos y plazos de envío

5.

Nikhil Rahagude
Publicado por LAP Lambert Academic Publishing (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Cantidad disponible: > 20
Impresión bajo demanda
Librería
Books2Anywhere
(Fairford, GLOS, Reino Unido)
Valoración
[?]

Descripción LAP Lambert Academic Publishing, 2011. PAP. Condición: New. New Book. Delivered from our UK warehouse in 3 to 5 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000. Nº de ref. del artículo: LQ-9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 47,42
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 10,22
De Reino Unido a Estados Unidos de America
Destinos, gastos y plazos de envío

6.

Nikhil Rahagude
Publicado por LAP Lambert Acad. Publ. Feb 2011 (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Taschenbuch Cantidad disponible: 1
Librería
Rheinberg-Buch
(Bergisch Gladbach, Alemania)
Valoración
[?]

Descripción LAP Lambert Acad. Publ. Feb 2011, 2011. Taschenbuch. Condición: Neu. Neuware - While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored. 96 pp. Englisch. Nº de ref. del artículo: 9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 49,00
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 17,13
De Alemania a Estados Unidos de America
Destinos, gastos y plazos de envío

7.

Nikhil Rahagude
Publicado por LAP Lambert Acad. Publ. Feb 2011 (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Taschenbuch Cantidad disponible: 1
Librería
BuchWeltWeit Inh. Ludwig Meier e.K.
(Bergisch Gladbach, Alemania)
Valoración
[?]

Descripción LAP Lambert Acad. Publ. Feb 2011, 2011. Taschenbuch. Condición: Neu. Neuware - While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored. 96 pp. Englisch. Nº de ref. del artículo: 9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 49,00
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 17,13
De Alemania a Estados Unidos de America
Destinos, gastos y plazos de envío

8.

Nikhil Rahagude; Dr. Michael Hsiao
Publicado por LAP LAMBERT Academic Publishing (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Paperback Cantidad disponible: 1
Librería
Irish Booksellers
(Portland, ME, Estados Unidos de America)
Valoración
[?]

Descripción LAP LAMBERT Academic Publishing, 2011. Paperback. Condición: New. book. Nº de ref. del artículo: M3843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 73,28
Convertir moneda

Añadir al carrito

Gastos de envío: GRATIS
A Estados Unidos de America
Destinos, gastos y plazos de envío

9.

Nikhil Rahagude
Publicado por LAP Lambert Academic Publishing, Germany (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Paperback Cantidad disponible: 1
Librería
The Book Depository EURO
(London, Reino Unido)
Valoración
[?]

Descripción LAP Lambert Academic Publishing, Germany, 2011. Paperback. Condición: New. Language: English . Brand New Book. While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored. Nº de ref. del artículo: KNV9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 73,49
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 3,41
De Reino Unido a Estados Unidos de America
Destinos, gastos y plazos de envío

10.

Nikhil Rahagude
Publicado por LAP Lambert Acad. Publ. Feb 2011 (2011)
ISBN 10: 3843388016 ISBN 13: 9783843388016
Nuevo Taschenbuch Cantidad disponible: 1
Impresión bajo demanda
Librería
AHA-BUCH GmbH
(Einbeck, Alemania)
Valoración
[?]

Descripción LAP Lambert Acad. Publ. Feb 2011, 2011. Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Neuware - While conventional test point insertions commonly used in design for testability can improve fault coverage, the test points selected may not necessarily be the best candidates to aid silicon diagnosis. This book targets test point insertions to detect more faults as well as to distinguish currently indistinguishable fault-pairs. This is achieved by identifying those points in the circuit, which are not only hard-to-test but also lie on distinguishable frontiers, as Testability-Diagnosability (TD) points. To this end, a novel low-cost metric to identify such TD points is proposed. Further, a new DFT + DFD architecture is developed, which adds just one pin (to identify test/functional mode) and small additional combinational logic to the circuit under test. In the other part, improving diagnosis in BIST environment is targeted. To facilitate diagnosis, researchers have proposed the use of two additional on-chip embedded memories, response memory to store reference responses and fail memory to store failing responses. In this book, a novel architecture is proposed which requires only one additional memory and responses of only a small subset of available test patterns are stored. 96 pp. Englisch. Nº de ref. del artículo: 9783843388016

Más información sobre este vendedor | Contactar al vendedor

Comprar nuevo
EUR 49,00
Convertir moneda

Añadir al carrito

Gastos de envío: EUR 29,50
De Alemania a Estados Unidos de America
Destinos, gastos y plazos de envío

Existen otras copia(s) de este libro

Ver todos los resultados de su búsqueda