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Sinopsis

Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking (MC)) or deductive reasoning (theorem proving). The combination of the two approaches promises to overcome the limitation and to enhance the capabilities of each. Our research is motivated by this goal. In this book, we provide the necessary infrastructure (data structure + algorithms) to define high level states exploration in the HOL theorem prover named as MDG-HOL platform. We have based our approach on Multiway Decision Graphs (MDGs). We formalize the basic MDG operations within HOL following a deep embedding approach. Then, we derive the correctness proof for each MDG basic operator. Based on this platform, the MDG reachability analysis is defined in HOL as a conversion that uses the MDG theory within HOL. Finally, we propose a reduction technique to improve MDGs MC based on MDG-HOL platform. The idea is to prune the transition relation of the circuits using pre-proved theorems from the specification given at system level. We use the consistency of the specifications to verify if the reduced model is faithful to the original one.

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Reseña del editor

Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking (MC)) or deductive reasoning (theorem proving). The combination of the two approaches promises to overcome the limitation and to enhance the capabilities of each. Our research is motivated by this goal. In this book, we provide the necessary infrastructure (data structure + algorithms) to define high level states exploration in the HOL theorem prover named as MDG-HOL platform. We have based our approach on Multiway Decision Graphs (MDGs). We formalize the basic MDG operations within HOL following a deep embedding approach. Then, we derive the correctness proof for each MDG basic operator. Based on this platform, the MDG reachability analysis is defined in HOL as a conversion that uses the MDG theory within HOL. Finally, we propose a reduction technique to improve MDGs MC based on MDG-HOL platform. The idea is to prune the transition relation of the circuits using pre-proved theorems from the specification given at system level. We use the consistency of the specifications to verify if the reduced model is faithful to the original one.

Biografía del autor

Sa?ed Abed received in 94 & 96 his B.Sc. & M.Sc. in Elec. & Comp. Eng. from JUST, Jordan. In June 2008, he received his Ph.D. in Comp. Eng. from Concordia University, Canada. In 2008 Dr. Abed joined the Comp. Eng. Dep. of Hashemite University, Jordan, as an Assistant Professor. Dr. Abed?s research interests include Verification and Formal Methods.

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  • EditorialLAP Lambert Academic Publishing
  • Año de publicación2009
  • ISBN 10 3838317386
  • ISBN 13 9783838317380
  • EncuadernaciónTapa blanda
  • IdiomaInglés
  • Número de páginas160
  • Contacto del fabricanteno disponible

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Sa\'\'ed Abed|Otmane Ait Mohamed
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Sa''ed Abed
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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking (MC)) or deductive reasoning (theorem proving). The combination of the two approaches promises to overcome the limitation and to enhance the capabilities of each. Our research is motivated by this goal. In this book, we provide the necessary infrastructure (data structure + algorithms) to define high level states exploration in the HOL theorem prover named as MDG-HOL platform. We have based our approach on Multiway Decision Graphs (MDGs). We formalize the basic MDG operations within HOL following a deep embedding approach. Then, we derive the correctness proof for each MDG basic operator. Based on this platform, the MDG reachability analysis is defined in HOL as a conversion that uses the MDG theory within HOL. Finally, we propose a reduction technique to improve MDGs MC based on MDG-HOL platform. The idea is to prune the transition relation of the circuits using pre-proved theorems from the specification given at system level. We use the consistency of the specifications to verify if the reduced model is faithful to the original one. 160 pp. Englisch. Nº de ref. del artículo: 9783838317380

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Sa''ed Abed
Publicado por LAP LAMBERT Academic Publishing, 2009
ISBN 10: 3838317386 ISBN 13: 9783838317380
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Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking (MC)) or deductive reasoning (theorem proving). The combination of the two approaches promises to overcome the limitation and to enhance the capabilities of each. Our research is motivated by this goal. In this book, we provide the necessary infrastructure (data structure + algorithms) to define high level states exploration in the HOL theorem prover named as MDG-HOL platform. We have based our approach on Multiway Decision Graphs (MDGs). We formalize the basic MDG operations within HOL following a deep embedding approach. Then, we derive the correctness proof for each MDG basic operator. Based on this platform, the MDG reachability analysis is defined in HOL as a conversion that uses the MDG theory within HOL. Finally, we propose a reduction technique to improve MDGs MC based on MDG-HOL platform. The idea is to prune the transition relation of the circuits using pre-proved theorems from the specification given at system level. We use the consistency of the specifications to verify if the reduced model is faithful to the original one. Nº de ref. del artículo: 9783838317380

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Sa''ed Abed
ISBN 10: 3838317386 ISBN 13: 9783838317380
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Taschenbuch. Condición: Neu. Neuware -Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking (MC)) or deductive reasoning (theorem proving). The combination of the two approaches promises to overcome the limitation and to enhance the capabilities of each. Our research is motivated by this goal. In this book, we provide the necessary infrastructure (data structure + algorithms) to define high level states exploration in the HOL theorem prover named as MDG-HOL platform. We have based our approach on Multiway Decision Graphs (MDGs). We formalize the basic MDG operations within HOL following a deep embedding approach. Then, we derive the correctness proof for each MDG basic operator. Based on this platform, the MDG reachability analysis is defined in HOL as a conversion that uses the MDG theory within HOL. Finally, we propose a reduction technique to improve MDGs MC based on MDG-HOL platform. The idea is to prune the transition relation of the circuits using pre-proved theorems from the specification given at system level. We use the consistency of the specifications to verify if the reduced model is faithful to the original one.Books on Demand GmbH, Überseering 33, 22297 Hamburg 160 pp. Englisch. Nº de ref. del artículo: 9783838317380

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Abed, Sa*ed
Publicado por LAP Lambert Academic Publishing, 2009
ISBN 10: 3838317386 ISBN 13: 9783838317380
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