Debug Automation from Pre-Silicon to Post-Silicon - Tapa blanda

Acerca del autor

Mehdi Dehbashi received his M.Sc. in computer engineering from Sharif University of Technology, Tehran, Iran, in 2007 and his PhD in computer science from University of Bremen, Bremen, Germany in 2013.  He is currently a researcher with the Group of Cyber-Physical Systems of the German Research Center for Artificial Intelligence (DFKI). His research interests are computer aided design for circuits and systems, dependable embedded systems design, and distributed embedded systems.

Goerschwin Fey is a professor for Reliable Embedded Systems at the University of Bremen and heads the Department of Avionics Systems at the Institute of Space Systems of the German Aerospace Center (DLR). He received his Diploma in Computer Science from Martin-Luther-Universität Halle-Wittenberg in 2001 and his PhD in Computer Science from University of Bremen in 2006. Goerschwin published more than 50 papers at international conferences and journals. His research yields advanced tool support for embedded system's design with a focus on automated debugging, diagnosis and design understanding.

De la contraportada

This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers.

• Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages;
• Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level;
• Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.