Artículos relacionados a Digital System Verification: A Combined Formal Methods...

Digital System Verification: A Combined Formal Methods and Simulation Framework (Synthesis Lectures on Digital Circuits and Systems) - Tapa blanda

 
9781608451784: Digital System Verification: A Combined Formal Methods and Simulation Framework (Synthesis Lectures on Digital Circuits and Systems)

Sinopsis

Integrated circuit capacity follows Moore's law, and chips are commonly produced at the time of this writing with over 70 million gates per device. Ensuring correct functional behavior of such large designs before fabrication poses an extremely challenging problem. Formal verification validates the correctness of the implementation of a design with respect to its specification through mathematical proof techniques. Formal techniques have been emerging as commercialized EDA tools in the past decade. Simulation remains a predominantly used tool to validate a design in industry. After more than 50 years of development, simulation methods have reached a degree of maturity, however, new advances continue to be developed in the area. A simulation approach for functional verification can theoretically validate all possible behaviors of a design but requires excessive computational resources. Rapidly evolving markets demand short design cycles while the increasing complexity of a design causes simulation approaches to provide less and less coverage. Formal verification is an attractive alternative since 100% coverage can be achieved; however, large designs impose unrealistic computational requirements. Combining formal verification and simulation into a single integrated circuit validation framework is an attractive alternative. This book focuses on an Integrated Design Validation (IDV) system that provides a framework for design validation and takes advantage of current technology in the areas of simulation and formal verification resulting in a practical validation engine with reasonable runtime. After surveying the basic principles of formal verification and simulation, this book describes the IDV approach to integrated circuit functional validation. Table of Contents: Introduction / Formal Methods Background / Simulation Approaches / Integrated Design Validation System / Conclusion and Summary

"Sinopsis" puede pertenecer a otra edición de este libro.

Críticas

“...the authors intend for this book to familiarize engineers and engineering managers--who might be completely new to pre-silicon validation and its terminologies--with the topic, and to briefly outline the most prevalent concepts. If I were a manager just taking over responsibility of a validation team from a past design-oriented job, I might read this book in a few hours to become familiar with the concepts... reading this book will give the uninitiated a quick overview to help them quickly grasp the big picture; busy professionals could read it in a few hours.” – Sandeep Shukla for ACM Computing Reviews

Reseña del editor

This book focuses on an Integrated Design Validation (IDV) system that provides a framework for design validation and takes advantage of current technology in the areas of simulation and formal verification resulting in a practical validation engine with reasonable runtime. After surveying the basic principles of formal verification and simulation, this book describes the IDV approach to integrated circuit functional validation. Table of Contents: Introduction / Formal Methods Background / Simulation Approaches / Integrated Design Validation System / Conclusion and Summary

"Sobre este título" puede pertenecer a otra edición de este libro.

  • EditorialMorgan and Claypool Publishers
  • Año de publicación2010
  • ISBN 10 160845178X
  • ISBN 13 9781608451784
  • EncuadernaciónTapa blanda
  • IdiomaInglés
  • Número de páginas100
  • Contacto del fabricanteno disponible

Comprar usado

Condición: Aceptable
Ex-library with the usual features...
Ver este artículo

EUR 36,21 gastos de envío desde Estados Unidos de America a España

Destinos, gastos y plazos de envío

Otras ediciones populares con el mismo título

9783031798146: Digital System Verification: A Combined Formal Methods and Simulation Framework

Edición Destacada

ISBN 10:  3031798147 ISBN 13:  9783031798146
Editorial: Springer, 2010
Tapa blanda

Resultados de la búsqueda para Digital System Verification: A Combined Formal Methods...

Imagen de archivo

Lun Li; Mitchell A. Thornton
Publicado por Morgan & Claypool, 2010
ISBN 10: 160845178X ISBN 13: 9781608451784
Antiguo o usado Soft Cover

Librería: BookOrders, Russell, IA, Estados Unidos de America

Calificación del vendedor: 4 de 5 estrellas Valoración 4 estrellas, Más información sobre las valoraciones de los vendedores

Soft Cover. Condición: Good. Ex-library with the usual features. Library label on front cover. The interior is clean and tight. Binding is good. Cover shows light wear. Ex-Library. Nº de ref. del artículo: 122169x

Contactar al vendedor

Comprar usado

EUR 26,64
Convertir moneda
Gastos de envío: EUR 36,21
De Estados Unidos de America a España
Destinos, gastos y plazos de envío

Cantidad disponible: 1 disponibles

Añadir al carrito