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Sinopsis
This book is devoted to logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed which allows obtaining FSM circuits required minimum amount of internal chip resources.
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Acerca del autor
Alexander Barkalov received his M.Sc. degree in Computer Engineering from the Donetsk Politechnical Institute (currently Donetsk National Technical University), Ukraine, in 1976, and his Ph.D. degree in Computer Science from the Leningrad Institute of Precise Mechanics and Optics, Russia, in 1983. In 1995 he received Doctor of Technical Sciences degree in Computer Science from Institute of Cybernetics named after V.M. Glushkov (Kiev, Ukraine). He has been a Professor (since 1996) at the Institute of Computers, Donetsk National Technical University. From 2003 he is a Professor of Computer Engineering at the Institute of Informatics and Electronics, University of Zielona Góra, Poland, and he still is a Professor at the Institute of Computers, Donetsk National Technical University. His current research interests include theory of digital automata, especially the methods of synthesis and optimization of control units implemented with field-programmable logic devices.
Larysa Titarenko (member of HiPEAC) received the M.Sc. (1993), PhD (1996) and Doctor of Technical Sciences (2005) degree in Telecommunications from Kharkov National University of Radioelectronics, Ukraine. Since 2007 she has been a Professor of Telecommunications at the Institute of Informatics and Electronics, University of Zielona Góra, Poland, and she is still a Professor of telecommunications at the Institute of Infocommunication Engineering, Kharkov National University of Radioelectronics, Ukraine. Her current research interests include theory of telecommunication systems, theory of antennas and theory of digital automata and its applications.
Kazimierz Krzywicki obtained PhD in computer science from University of Zielona Gora in 2019. Since 2010, he founded and heads the KGK Pro company, which creates software and hardware solutions. The main areas of activity are embedded systems and Internet of Things – especially animal tracking devices. The company was the first in the world to introduce a bird tracking device equipped with a camera. For over 12 years he has been an expert witness and computer forensics investigator. He is also a member of PTI (Polish Information Processing Society). His research interests include design and implementation of distributed embedded systems and hardware synthesis for reprogrammable devices.
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Logic Synthesis for FPGA-Based Mealy Finite State Machines (Hardcover)
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Hardcover. Condición: new. Hardcover. This book is devoted to the logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed, which allows obtaining FSM circuits required minimum amount of internal chip resources.Logic Synthesis for FPGA-Based Mealy Finite State Machines: Structural Decomposition in Logic Design contains several original synthesis and optimization methods based on the structural decomposition of FPGA-based FSM circuits developed by the authors. To optimize FSM circuits, the authors introduce the use of three methods of state assignment: twofold, extended, and composite. These methods allow for the creation of two- or three-level architectures of FSM circuits. The authors also demonstrate how the proposed methods, FSM architectures and synthesis methods can replace known solutions based on either functional decomposition or classical methods of structural decomposition. The authors also show how these architectures have regular systems of interconnections and demonstrate positive features compared to methods based on functional decomposition, including producing circuits with fewer elements that are faster and consume less power than their counterparts. The book includes experimental results proving the efficiency of the proposed solutions and compares the numbers in Look-up Tables (LUTs), showing the performance (maximum operating frequency) and power consumption for various methods of state assignment.The audience for this book is students, researchers, and engineers specializing in computer science/ engineering, electronics, and telecommunications. It will be especially useful for engineers working within the scope of algorithms, hardware-based software accelerators and control units, and systems based on the use of FPGAs. This book is devoted to logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed which allows obtaining FSM circuits required minimum amount of internal chip resources. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability. Nº de ref. del artículo: 9781032882277
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