Digital Signal Processing System and Its Realization examines the concept of a digital signal processing system as a finite state machine. This idea connects two previously unrelated concepts (finite state machine and digital signal processing system) and solves the problems arising from finite word length in digital signal processing systems. The book is divided into nine chapters. Errors and oscillations in DSP systems, principle, and application of finite state machines are reviewed in Chapter 1. Chapters 2 and 3 describe the finite state machine representation of DSP systems and the logic function representation of FSMs. The stability of finite state machines and the stable realization of an IIR digital filter as a finite state machine are studied in Chapter 4 and 5. Chapter 6 proposes two methods for the synthesis of stable feedback shift registers. A systematic study for minimization of Exclusive-OR logic circuits is presented in Chapter 7. Chapters 8 and 9 give a DFT algorithm using subgroup convolutions and a fast recursive Digital Fourier Transform (DFT) with (N-1) /2 real multiplications.
"Sinopsis" puede pertenecer a otra edición de este libro.
Digital Signal Processing System and Its Realization examines the concept of a digital signal processing system as a finite state machine. This idea connects two previously unrelated concepts (finite state machine and digital signal processing system) and solves the problems arising from finite word length in digital signal processing systems. The book is divided into nine chapters. Errors and oscillations in DSP systems, principle, and application of finite state machines are reviewed in Chapter 1. Chapters 2 and 3 describe the finite state machine representation of DSP systems and the logic function representation of FSMs. The stability of finite state machines and the stable realization of an IIR digital filter as a finite state machine are studied in Chapter 4 and 5. Chapter 6 proposes two methods for the synthesis of stable feedback shift registers. A systematic study for minimization of Exclusive-OR logic circuits is presented in Chapter 7. Chapters 8 and 9 give a DFT algorithm using subgroup convolutions and a fast recursive Digital Fourier Transform (DFT) with (N-1) /2 real multiplications.
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