VHDL for Logic Synthesis - Tapa dura

Rushton, J.R.

 
9780077090920: VHDL for Logic Synthesis

Sinopsis

This guide covers the VHSIC Hardware Description Language (VHDL) as it is used specifically for logic synthesis. The basics of logic and synthesis are described initially, after which more advanced techniques are developed. The text finishes with techniques for writing effective test benches.

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Reseña del editor

This is the first book to detail the use of VHDL with logic synthesis techniques, showing how to use the hardware description language to achieve SLSI design results. It explains VHDL features in terms of the hardware mappings performed in synthesis basics, then builds to more advanced topics, like the writing of VHDL packages and the writing of effective text benches.

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