"Sinopsis" puede pertenecer a otra edición de este libro.
"Sobre este título" puede pertenecer a otra edición de este libro.
Gastos de envío:
GRATIS
A Estados Unidos de America
Descripción Soft Cover. Condición: new. Nº de ref. del artículo: 9781461367840
Descripción Condición: New. Nº de ref. del artículo: ABLIING23Mar2716030033322
Descripción Condición: New. PRINT ON DEMAND Book; New; Fast Shipping from the UK. No. book. Nº de ref. del artículo: ria9781461367840_lsuk
Descripción Paperback / softback. Condición: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days. Nº de ref. del artículo: C9781461367840
Descripción Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - The Verilog language is a hardware description language which provides a means of specifying a digital system at a wide range of levels of abstraction. The language supports the early conceptual stages of design with its behavioral level of abstraction, and the later implementation stages with its structural level of abstraction. The language provides hierarchical constructs, allowing the designer to control the complexity of a description. Verilog was originally designed in the winter of 1983/84 as a proprietary verification/simulation product. Since then, several other proprietary analysis tools have been developed around the language, including a fault simulator and a timing analyzer; the language being instrumental in providing consistency across these tools. Now, the language is openly available for any tool to read and write. This book introduces the language. It is sometimes difficult to separate the language from the simulator tool because the dynamic aspects of the language are defined by the way the simulator works. Where possible, we have stayed away from simulator-specific details and concentrated on design specification, but have included enough information to be able to have working executable models. The book takes a tutorial approach to presenting the language. Nº de ref. del artículo: 9781461367840
Descripción Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The Verilog language is a hardware description language which provides a means of specifying a digital system at a wide range of levels of abstraction. The language supports the early conceptual stages of design with its behavioral level of abstraction, and. Nº de ref. del artículo: 4194947
Descripción Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The Verilog language is a hardware description language which provides a means of specifying a digital system at a wide range of levels of abstraction. The language supports the early conceptual stages of design with its behavioral level of abstraction, and the later implementation stages with its structural level of abstraction. The language provides hierarchical constructs, allowing the designer to control the complexity of a description. Verilog was originally designed in the winter of 1983/84 as a proprietary verification/simulation product. Since then, several other proprietary analysis tools have been developed around the language, including a fault simulator and a timing analyzer; the language being instrumental in providing consistency across these tools. Now, the language is openly available for any tool to read and write. This book introduces the language. It is sometimes difficult to separate the language from the simulator tool because the dynamic aspects of the language are defined by the way the simulator works. Where possible, we have stayed away from simulator-specific details and concentrated on design specification, but have included enough information to be able to have working executable models. The book takes a tutorial approach to presenting the language. 244 pp. Englisch. Nº de ref. del artículo: 9781461367840
Descripción PF. Condición: New. Nº de ref. del artículo: 6666-IUK-9781461367840